SONET/SDH Clock Generators

SONET/SDH clock multiplier and jitter attenuator devices provide the industry’s best performance in the smallest footprint. Offering jitter generation of less than 0.3 ps RMS (OC-192/STM-64), these devices outperform discrete implementations and hybrid clock solutions while integrating features such as selectable forward error correction (FEC), frequency scaling, pin-selectable loop filter bandwidths and MTIE-compliant hitless switching. Based on our DSPLL® technology, SONET/SDH ICs provide a fully integrated PLL, eliminating the need for sensitive external loop filter components and costly VCXOs.

RMS phase jitter
0.3 ps
Package type
PBGA63

SONET Clock Generator Common Specs

  • Ultra-low jitter clock output with jitter generation as low as 0.3 ps RMS
  • Clock output range from 19 to 2,775 MHz
  • Up to three switchable clock inputs
  • Loss-of-lock indication
  • Digital hold for loss-of-input clock
  • Small footprints
  • FEC scaling
  • Hitless switching
  • Low power consumption

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Part Number Input Frequency Output Frequency Output Format(s) Phase Jitter (RMS) Package Type Package Size (mm) Description Control Reference Inputs VDD (V) VDDO (V) Clock Generators

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