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//
Timing // PCI Express Learning Center

PCI Express Learning Center

Welcome to Silicon Labs PCI Express (PCIe) Learning Center. As PCIe interconnect is becoming increasingly popular as a common data bus standard, Silicon Labs has created this one-stop-page for you to know everything about PCIe. Get updates on the latest PCIe standard specifications, learn how to take jitter measurements and discover Silicon Labs PCIe timing solutions and design tips. Become a PCIe expert yourself!

PCI Express Clock Jitter Tool

The PCIe Clock Jitter Tool is designed to enable users to quickly and easily take jitter measurements for PCIe Gen1/2/3/4/5 and SRNS/SRIS. This software takes away all the guesswork of PCIe Gen1/2/3/4/5 and SRNS/SRIS jitter measurements and margins in board designs. This tool will provide you with accurate results in just a few clicks. This software tool is provided in an executable format to support various common input waveform file, like .csv, .wfm and .bin. The easy-to-use GUI and helpful tips guide users through each step. Release notes and other documentation are also included in the software package.

Download Tool


Silicon Labs PCIe Clock Jitter Tool Sample Data Files 

Part Number Description Data Files and Instructions
Si52204 PCIe Gen1/2/3/4/5 Clock Generator Download (236 MB)
Si5332 Low JItter Clock Generator Download (90 MB)
Si52147 PCIe Gen1/2/3 Clock Generator Download (28 MB)
Si5338 Any-Frequency, Any-Output Clock Generator Download (24 MB)

Training Video

PCIe Clock Jitter Tool

Explore the PCIe Clock Jitter Tool to uncover the fast and easy way to take PCIe Gen1/2/3/4/5 and SRNS/SRIS jitter measurements in just a few clicks!



Whitepaper

Timing Jitter Tutorial and Measurement Guide

View Now

Whitepaper

Reducing EMI and Improving Signal Integrity Using SSC

Learn More

Whitepaper

Clock Generator Considerations for Rapidly Growing PCIe Market

Read Now

Whitepaper

Selecting the Optimal PCIe Source

Learn More

PCIe Clock and Buffer Products

Si532xx PCIe Gen1/2/3/4 Clock Buffers

Si522xx PCIe Gen1/2/3/4/5 Clock Generators

Si521xx PCIe Gen1/2/3 Clock Generators

PCIe Zero Delay Buffers and Clock Buffers

Automotive PCIe Buffers

Automotive PCIe Clocks

PCIe Documentation

View All

AN1104: Making Accurate PCIe Gen 4.0 Clock JItter Measurements

AN946: PCI Express 4.0 Jitter Requirements

AN951: Driving Long Traces on PCIe Backplanes for Simple Evaluation

AN871: Driving Long PCIe Clock Lines

AN781: Alternative Output termination for Si5211x, Si5213x, Si5214x, Si5216x, Si5310x, Si5311x and Si5315x PCIe Clock Generator and Buffer Families

AN562: PCI Express 3.1 Jitter Requirements

AN636: Signal Integrity Tuning

View All

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