Wireless Jitter Attenuator Common Specs
- Digital frequency synthesis eliminates external VCXO and analog filter components
- Jitter performance < 100 fs RMS typ (12 kHz - 20 MHz)
- 1, 2, and 4 DSPLL options
- Input frequency range:
- Differential: 10 MHz - 750 MHz
- LVCMOS: 10 MHz - 250 MHz
- Cost effective oscillator
- Selectable loop bandwidth
Find the Right Wireless Clock Jitter Attenuator
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Part Number | Customize | Input Frequency | Output Format(s) | DSPLLs | Number of Inputs | Phase Jitter (RMS) | 4G/LTE Wireless Clocks | Output Frequency Max | Description | VDD (V) | VDDO (V) | Package Type | Package Size (mm) | Number of Outputs |
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