LVPECL Clock Buffers

Our LVPECL clock buffers are low jitter non-PLL based fanout buffers delivering best-in-class performance, minimal cross-talk and superior supply noise rejection. Devices are available in industrial and automotive grade2 temperature ranges. With additive jitter as low as 50-fs RMS, our LVPECL buffers deliver up to 10 output clocks from DC to 1250 MHZ.

Up to 10
Operating frequency
DC - 1.25 GHz

LVPECL Buffer Common Specs

  • Up to 10 differential LVPECL outputs
  • Wide operating frequency DC - 1.25 GHz
  • Accepts any differential or single-ended input
  • Provides signal level translation
  • Output Enable (OEB) pin allows glitchless control of output clocks
  • Loss of Signal (LOS) indicator allows system clock monitoring
  • Automotive Grade2, -40 to +105 °C
  • AECQ-100 qualified options
  • Output driver supply voltage independent of core supply: 1.5, 1.8, 2.5, or 3.3 V
  • Additive jitter: 150 fs RMS typ
  • Industrial temperature range: -40 to +105 °C


Find the Right LVPECL Buffer Select Columns
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Part Number Number of Inputs Number of Outputs Frequency Min (MHz) Frequency Max Output Format(s) Additive Jitter VDD (V) VDDO (V) Package Type Package Size (mm) Universal Buffers Differential Buffers LVCMOS Buffers PCIe Compliant Zero Delay Buffers Automotive

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